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• Vitae (Jung Pill Kim)
  Ph.D Candidate, Electrical Engineering , Harvard University

• Research interests
  • VLSI Design
    • ULV/ULP(Ultra Low voltage / power) VLSI Design
    • Embedded Memory Design/Merged Memory Logic(MML)
    • High performance memory design(on constructioin)
    • Future Memory Design : FeRAM, Magnetic RAM and so on
    • Testable Memory Design (BIST/DFT)
  • Computer Architecture
  • Image processing (Image and video compression)

• Acamedic directory
  • course directory
  • Thesis Advisor : Professor Woodward Yang

• useful sites

  If you have any comments and questions, send me a mail at jpkim@eecs.harvard.edu