Syllabus Spring 2018
Textbook Chapter Introduction
Tutorials Using CAD Tools on a Remote Server
Getting started with CAD
Corner Analysis
Editing a Layout
Checking Design Rules (DRC)
Checking Layout Versus Schematic (LVS)
Extracting Parasitics (PEX)
Simulating Post-PEX Netlists
Verilog According to Lukasz
Verilog Two-Phase Clocking Guide
Verilog According to Tom
Verilog Test Bench Primer
Synthesis
Placement and Routing
Simulation with Vectors from Verilog
VCS RTL Simulation
Guides Synthesis
Simulation